This work presents a 5–6 GHz full-duplex (FD) multiple-input and multiple-output (MIMO) transmitter front-end based on a quadrature balanced power amplifier (QBPA) topology and wideband digital interference cancellation. The proposed architecture benefits from low implementation complexity and is compatible with MIMO scaling with no additional hardware and power consumption penalties. The QBPA chip was fabricated in 180 nm CMOS and assembled on a four-element PCB MIMO array. The system was measured using a 320 MHz OFDM signal with 11 dB PAPR at 4 dBm TX power per element. 44 dB of combined self and cross-interference (XI) cancellation in the RF domain is demonstrated while requiring only −17 dBm of canceling signal power, along with −32 dB of TX EVM and 0.7 and 1.8 dB of TX and RX insertion losses (ILs), respectively. The standalone QBPA chip delivers Psat and peak PAE of >19.3 dBm and >31%, respectively, between 5 and 6 GHz.

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