Articles

A simultaneous transmit-receive quadrature balanced RF front-end with wideband digital self interference cancellation

This paper presents a quadrature balanced RF Front-End transceiver architecture and a digital self-interference cancellation (SIC) algorithm for simultaneous transmit-receive (Tx-Rx) in next generation half-duplex and full-duplex radios. Tx-Rx isolation of >57dB is measured for CW signals over 80MHz BW,...

Transceiver Architectures for Full Duplex Systems with Unmatched Receiver

In this paper, we present an overview of both the challenges and the state-of-the-art in full duplex (FD) integrated transceivers in terms of loss and noise. New circuit concept is presented for mismatched receiver design with a cancelling path. An...

Time-multiplexed parsing in marking-based network telemetry

Network telemetry is a key capability for managing the health and efficiency of a large-scale network. Alternate Marking Performance Measurement (AM-PM) is a recently introduced approach that accurately measures the packet loss and delay in a network using a small...

A Quadrature Balanced Multi-Mode RF Front-End Architecture with Wideband Ultra Low Power Self Interference Cancellation

This paper presents a quadrature balanced RF Front-End architecture with a built-in primary isolation for a single antenna Full Duplex and Time Division Duplex wireless communications. Self-interference cancellation is implemented by injecting a digitally synthesized cancellation signal into a dedicated...

Modified re-configurable quadrature balanced power amplifiers for half and full duplex RF front ends

An RF front-end (RFFE) architecture for dual-mode half and full duplex operation, employing a modified quadrature balanced power amplifier (QBPA), is proposed, where the receive channel is connected to the QBPA transmit isolated output.

A Robust Reconfigurable Front-End for Non-contiguous Multi-Channel Carrier Aggregation Receivers

A new architecture for multi-channel carrier aggregation receivers is proposed for eliminating risks of VCO injection pulling and mitigating performance degradation resulting from Multi-Lomutual coupling. A fully integrated receiver front-end is implemented, enabling the realization of a robust multi-LO triple-carrier-aggregation...

Low-PAPR OFDM-based waveform for fifth-generation cellular communications

We introduce a novel technique for improving PA efficiency and coverage of communication links, especially advantageous for the uplink at high frequencies (cm/mm-Waves). The technique is based on a superposition of several DFT-s-OFDM (a.k.a. SC-FDM) signals, whose modulated symbol sequences...

Trapezoidal block split using orthogonal C2 transforms for HEVC video coding

We present an extension for HEVC intra-frame coding with trapezoidal splits and orthogonal transforms. A block can be split into two 180-degrees rotationally-symmetric (C2) trapezoidal parts, each coded separately using standard DCT implementation.

ScaleSimulator: A Fast and Cycle-Accurate Parallel Simulator for Architectural Exploration

Design of next generation computer systems should be supported by simulation infrastructure that must achieve a few contradictory goals such as fast execution time, high accuracy, and enough flexibility to allow comparison between large numbers of possible design points.