This letter compares analog and digital implementations of quadrature balanced power amplifier (QBPA) transceiver for full-duplex wireless operation. The design considerations of both architectures are laid out, and a comprehensive performance comparison between the two approaches based on theoretical and experimental results is proposed. For this end, a new QBPA chip prototype employing voltage-mode switched-capacitor RF DACs was fabricated in TSMC’s 65 nm CMOS, whereas the analog QBPA, reported in our previous work, comprises 180 nm CMOS current-mode class-AB PAs.

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